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august 2010 doc id 15153 rev 2 1/21 21 lnbp8l, LNBP9L lnbp10l, lnbp11l lnb supply and contro l voltage regulator features simplest integrated solution for lnb remote supply and control 500 ma guaranteed output current dual input supply for reducing power dissipation (dfn package) 3-state function to enable/disable and select the output voltage level through a single pin fast oscillator startu p for diseq? encoding (LNBP9L/11l versions) external 22 khz modulation input pin (lnbp8l/10l versions) cable length compensation, llc pin (lnbp10l, lnbp11l versions) short-circuit and over-temperature protection lnb overload and short-circuit dynamic protection (lnbp10l, lnbp11l versions) available in dfn8 (5 x 6 mm) and ippak packages description intended for analog and di gital satellite receivers, the lnbp is a monolithic lin ear voltage regulator, assembled in the dfn8 (5 x 6) and ippak packages, specifically designed to provide the powering voltages and the interfacing signals to the lnb down-converter. the regulator output can be logic controlled for 13 v or 18 v (typ.) by means of the en/vsel 3- state pin for remotely controlling the lnb. when the ic is powered and put in standby (en/vsel pin at high impedance), the regulator output is disabled. in order to reduce power dissipation, the lnbp10l/11l versions (on dfn package) feature 2 supply inputs: v cc1 and v cc2 . these pins must be powered, respectively, at 15 v (min.) and 22 v (min.), and an internal switch will automatically select the appropriate supply voltage according to the selected output voltage. the lnbp8l/9l versions (in the ippak package) have only one supply input pin, which must be supplied at 22 v (min.). additionally, the lnbp10l/11l versions have the llc pin to increment the selected output voltage value by 1 v (typ.) to compensate for the excess voltage drop along the coaxial cable (llc pin high). an analog 22 khz modulation input pin (extm) is available in the lnbp8l and lnbp10l versions. an appropriate dc blocking capacitor must be used to couple the modulating signal source to the extm pin. the lnbp10l/11l versions are also equipped with over-current dynamic protection: as soon as an overload is detected the output is shut down for the time t off, which is determined by the capacitor connected between the cext pin and gnd. after the time has elapsed, the output is resumed for a time t on = (1/12)*t off (typ.). if the overload is still present, the protection circuit will cycle again through t off and t on until the overload is removed. a typical t on +t off value is 1100 ms when a 4.7 f external capacitor is used on the c ext . this dynamic operation can greatly reduce the power dissipation in short-ci rcuit condition, while ensuring excellent power-on startup even with highly capacitive loads on the lnb outputs. the device is packaged in the ippak for through-hole mounting and in the dfn8 (5 x 6) for surface mounting. both package solutions are offered in two versions: with ten pins (LNBP9L/11l) to use with the integrated 22 khz tone generator, or with the extm pin (lnbp8l/10l) to use external 22 khz sources. all versions have built-in thermal protection to prevent overheating damage. dfn8 (5 x 6 mm) ippak www.st.com
contents lnbp8l, LNBP9L, lnbp10l, lnbp11l 2/21 doc id 15153 rev 2 contents 1 diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 detailed description and applicati on hints . . . . . . . . . . . . . . . . . . . . . . . 9 6.1 input voltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.2 single supply for the dfn package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.3 ippak mounting and thermal considerations . . . . . . . . . . . . . . . . . . . . . . 11 7 typical performance characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
lnbp8l, LNBP9L, lnbp10l, lnbp11l diagram doc id 15153 rev 2 3/21 1 diagram figure 1. block diagram lnbp8l/9l/10l/11l gnd tristate enable & vout selection vcc1 vcc2 en/vsel voltage reference llc cext dynamic current limit thermal protection r sense output extm ten 22khz oscillator lnbp8l/9l/10l/11l gnd tristate enable & vout selection vcc1 vcc2 en/vsel voltage reference voltage reference llc cext dynamic current limit thermal protection r sense output extm ten 22khz oscillator lnbp8l/9l/10l/11l gnd tristate enable & vout selection vcc1 vcc2 en/vsel voltage reference llc cext dynamic current limit thermal protection r sense output extm ten 22khz oscillator lnbp8l/9l/10l/11l gnd tristate enable & vout selection vcc1 vcc2 en/vsel voltage reference voltage reference llc cext dynamic current limit thermal protection r sense output extm ten 22khz oscillator
pin configuration lnbp8l, LNBP9L, lnbp10l, lnbp11l 4/21 doc id 15153 rev 2 2 pin configuration figure 2. pin connections (top view for ippak, bottom view for dfn8) dfn8 (5 x 6 mm) ippak table 1. pin description pin n (dfn) lnbp10/11l pin n (ippak) lnbp8/9l name pin function 1- vcc1 (not available for ippak) supply input 1: 15 v to 25 v supply. for dfn package it is automatically selected when v out = 13 v. for ippak package v cc1 and v cc2 are internally connected together to pin 1 to be supplied at 22 v min. 21 vcc2 (v cc pin for ippak) supply input 2: 22 v to 25 v supply. for dfn package it is automatically selected when v out = 18 v. for ippak package v cc1 and v cc2 are internally connected together to the pin 1 to be supplied at 22 v min. 32output output: regulator output. it is 13 v typ when en/vsel low and 18 v typ when en/vsel high. 4, epad 3, epad ground ground 64en/vsel enable and output voltage selection 3-state pin: logic control input 3-state pin for the remote controlling of the lnb; if low v out = 13 v, when high v out = 18 v, if left at high impedance the ic is set in shut down mode (v out = 0 v) 55extm/ten tone enable (lnbp9-11): logic control input to enable internal tone generator. external modulati on (lnbp8-10): needs dc decoupling to the ac source. if not used can be left floating. 8 na llc llc: logic control input to add 1 v typ. 7nac ext c ext : timing capacitor used by the dynamic overload protection. typical application is 4.7 f for a 1100 ms cycle
lnbp8l, LNBP9L, lnbp10l, lnbp11l maximum ratings doc id 15153 rev 2 5/21 3 maximum ratings note: absolute maximum ratings are those values beyond which damage to the device may occur. these are stress ratings only and functional operation of the device at these conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. all voltage values ar e with respect to network ground terminal unless otherwise stated. table 2. absolute maximum ratings symbol parameter value unit vcc1, vcc2 input voltages -0.3 to 28 v vcc1-output vcc1 voltage with respect to output voltage (1) 1. exposure beyond the vcc1 and vcc2 with respect to outp ut absolute-maximum-rated voltages during output pin overload or short-circuit to ground may cause permanent damage to the device. -0.3 to 25 v vcc2-output vcc2 voltage with respect to output voltage (1) -0.3 to 25 v en/vsel, ten, llc logic input voltage -0.3 to 7 v extm external modulation input voltage -0.3 to 1 v output output voltage -0.3 to 25 v t stg storage temperature range -50 to 150 c esd dfn package esd rating with human body model (hbm) for all pins except 1, 2, 6 2 kv esd rating with human body model (hbm) for pins 1, 2, 6 1.5 esd ippak package esd rating with human body model (hbm) for all pins except 1, 4 2 kv esd rating with human body model (hbm) for pins 1, 4 1.5 table 3. operating ratings symbol parameter value unit t j operating junction temperature range 0 to 125 c vcc1 input voltage 15 to 25 v vcc2 input voltage 22 to 25 v table 4. thermal data symbol parameter ippak dfn8 unit r thja thermal resistance junction-ambient 35 (mounted on pcb 2s2p) c/w r thjc thermal resistance junction-case 8 c/w
electrical characteristics lnbp8l, LNBP9L, lnbp10l, lnbp11l 6/21 doc id 15153 rev 2 4 electrical characteristics refer to the typical application circuits in figure 3 and figure 4 , v cc1 = 16 v, v cc2 = 23 v (1) , en/vsel = low, ten = llc = low, extm = floating, i out = 50 ma, t j = 0 c to 85 c, unless otherwise stated. typical values are referred to t j = 25 c. table 5. electrical characteristics symbol parameter test conditions min. typ. max. unit v cc1 v cc supply input 1 (1) i out = 500 ma, ten=high, en/vsel=low, llc=low 15 25 v i out = 500 ma, ten=high, en/vsel=low, llc= high 16 25 v cc2 v cc supply input 2 (1) i out = 500 ma, tone=high, en/vsel=high, llc=low 22 25 v i out = 500 ma, tone=high, en/vsel=high, llc= high 23 25 v out output voltage i out = 500 ma, en/vsel=low 12.5 13.25 14 v i out = 500 ma, en/vsel=high 17 18 19 v i out = 500 ma, en/vsel=low, llc=high (2) 14.25 v i out = 500 ma, en/vsel=llc=high (2) 19 v v out line regulation (1) v cc1 from 15 v to 18 v, en/vsel=low or high 540mv v out load regulation v cc1 = v cc2 = 22 v, i out from 50 ma to 500 ma, en/vsel=low or high 50 150 mv i max output current limiting 550 700 850 ma f tone tone frequency ten=high 20 22 24 khz a tone tone amplitude ten=high 0.4 0.65 0.9 v pp d tone tone duty cycle ten=high 40 50 60 % t r , t f tone rise and fall time ten=high (3) 51015 s g extm external modulation gain v out / v extm , freq. from 10 khz to 40 khz 4.5 5.5 6.5 v extm external modulation input voltage ac coupling 400 mv pp z extm external modulation impedance freq. from 10 khz to 40 khz 400 v ilt control input logic low threshold for 3-state pin en/vsel 0.8 1 1.2 v v iht control input logic high threshold for 3-state pin en/vsel 1.8 2 2.2 v i iht 3-state control pin input current high v iht = 5 v, en/vsel -400 a
lnbp8l, LNBP9L, lnbp10l, lnbp11l electrical characteristics doc id 15153 rev 2 7/21 symbol parameter test conditions min. typ. max. unit i ilt 3-state control pin input current low v ilt = 0 v, en/vsel +180 a v il control input logic low ten, llc 0.8 v v ih control input logic high ten, llc 2.5 v i ih control pins input current v ih = 5 v, ten, llc 20 a i cc supply current output disabled en/vsel=high impedance (floating) 1.7 2.4 ma output en abled en/vsel=high, ten=high, i out = 500 ma 3.7 6.3 ma t off dynamic overload protection off time output shorted, c ext = 4.7 f (2) 1000 ms t on dynamic overload protection on time output shorted, c ext = 4.7 f (2) t off /12 ms i obk output backward current output forced to 21 v 6 ma t shdn thermal shutdown threshold 165 c t shdn thermal shutdown hysteresis 25 c 1. for ippak package v cc1 and v cc2 are internally connected to the pin 1 (v cc ) to be supplied in the range from 22 v up to 25 v 2. only dfn package 3. guaranteed by design table 5. electrical characteristics (continued)
typical application circuits lnbp8l, LNBP9L, lnbp10l, lnbp11l 8/21 doc id 15153 rev 2 5 typical application circuits note: in a single supply configuration with the dfn package, an r 1 resistor in the 12-15 range is recommended to reduce device power dissipation during the 13 v output condition. the resistor can be omitted, but th e power dissipation will increase. figure 3. single input supply voltage solution for ippak package versions vcc en/vsel ( tristate ) output gnd extm or ten d1 1n4001 mcu i/os 23v lnbp8/9l c2 220nf c1 10 f lnb output c3 100nf d2 1n5818 vcc en/vsel (tristate ) output gnd extm or ten d1 1n4001 mcu i/os 23v lnbp8/9l c2 220nf c1 10 f lnb output c3 100nf d2 1n5818 vcc en/vsel ( tristate ) output gnd extm or ten d1 1n4001 mcu i/os 23v lnbp8/9l c2 220nf c1 10 f lnb output c3 100nf d2 1n5818 vcc en/vsel (tristate ) output gnd extm or ten d1 1n4001 mcu i/os 23v lnbp8/9l c2 220nf c1 10 f lnb output c3 100nf d2 1n5818 figure 4. dual input supply voltage solution for dfn8 (5 x 6 mm) package versions vcc1 en/vsel ( tristate ) output gnd extm or ten d1 1n4001 mcu i/os 16v lnbp10/11l c2 220nf c1 10 f c3 100nf d2 1n5818 lnb output llc vcc2 d3 1n4001 23v c5 220nf c4 10 f cext c6 4.7 f vcc1 en/vsel (tristate output gnd extm or ten d1 1n4001 mcu i/os 16v lnbp10/11l c2 220nf c1 10 f c3 100nf d2 1n5818 lnb output llc vcc2 d3 1n4001 23v c5 220nf c4 10 f cext c6 4.7 f vcc1 en/vsel ( tristate ) output gnd extm or ten d1 1n4001 mcu i/os 16v lnbp10/11l c2 220nf c1 10 f c3 100nf d2 1n5818 lnb output llc vcc2 d3 1n4001 23v c5 220nf c4 10 f cext c6 4.7 f vcc1 en/vsel (tristate output gnd extm or ten d1 1n4001 mcu i/os 16v lnbp10/11l c2 220nf c1 10 f c3 100nf d2 1n5818 lnb output llc vcc2 d3 1n4001 23v c5 220nf c4 10 f cext c6 4.7 f figure 5. single input supply voltage soluti on for dfn8 (5 x 6 mm) package versions vcc1 en/vsel ( tristate ) output gnd extm or ten d1 1n4001 mcu i/os lnbp10/11l c2 220nf c1 10 f c3 100nf d2 1n5818 lnb output llc vcc2 23v c4 220nf cext c5 4.7 f r1 15 ohm >3w vcc1 en/vsel (tristate ) output gnd extm or ten d1 1n4001 mcu i/os lnbp10/11l c2 220nf c1 10 f c3 100nf d2 1n5818 lnb output llc vcc2 23v c4 220nf cext c5 4.7 f r1 15 ohm >3w vcc1 en/vsel ( tristate ) output gnd extm or ten d1 1n4001 mcu i/os lnbp10/11l c2 220nf c1 10 f c3 100nf d2 1n5818 lnb output llc vcc2 23v c4 220nf cext c5 4.7 f r1 15 ohm >3w vcc1 en/vsel (tristate ) output gnd extm or ten d1 1n4001 mcu i/os lnbp10/11l c2 220nf c1 10 f c3 100nf d2 1n5818 lnb output llc vcc2 23v c4 220nf cext c5 4.7 f r1 15 ohm >3w
lnbp8l, LNBP9L, lnbp10l, lnbp11l detailed description and application hints doc id 15153 rev 2 9/21 6 detailed description and application hints the lnbpxx is made up of several functional blocks (see figure 1 on page 3 ), as described below: 1. the oscillator is activated by setting the ent pin (enabl e tone) = h, and is factory- trimmed at 22 khz 2 khz, eliminating the need to use external trimming. the rising and falling edges are maintained in the 5 to 15 s range (10 s typ.), to avoid rf pollution of the receiver. the duty cycle is 50% typ. it modulates the dc output with a 0.325 v typ. amplitude and 0 v average. the presence of this signal usually gives the lnb information about the band to be received. 2. the 3-state enable & v out selection block, selects the two output voltages or sets the ic to shutdown mode, d epending on the vo ltage applied on the en/vsel pin. when en/vsel is set high (en/vsel > 2.2 v), an 18 v output voltage is selected; when the en/vsel is set low (en/vsel < 0. 8 v), a 13 v output voltage is selected. if the en/vsel pin is left floa ting (high impedance) or if the pin is set in a range from 1.2 v to 1.8 v (1.5 v typ.), the ic goes in to shutdown mode and the output voltage will be set to 0 v. this feature changes the lnb polarization type. the lnb switches to horizontal or vertical polarization depending on the supply voltage it gets from the receiver. 3. for the dfn package, in order to keep the power dissipation of the device as low as possible, the input selector automatically selects v cc1 ; that is, the lowest input voltage, when 13 v output is selected (i.e. en/vsel is low). if the 18 v output is selected (i.e. en/vsel is high), the v cc2 input pin is selected. for example, power dissipation at i out = 350 ma is: p d = (23 - 18) x 0.35 = 1.75 w with v cc2 = 23 v (voltage on the v cc2 pin) and v out = 18 v, and p d = (16 - 13) x 0.35 = 1.05 w with v cc1 = 16 v (voltage on the v cc1 pin) and v out = 13 v for ippak package, v cc1 and v cc2 are internally connected and must be supplied from a single input voltage line (22 v min.) to the v cc pin. in this case the worst case power dissipation is 13 v output. for example: at i out = 350 ma and v cc = 23 v (voltage on the v cc pin): p d = (23 - 13) x 0.35 = 3.5 w 4. the line length compensation function is useful when the antenna is connected to the receiver by a long coaxial cable that adds a considerable dc voltage drop. when the lcc pin is h, the output voltage selected is increased by about 1 v. this function is available for the dfn package only. 5. the reference drives all the internal blocks that require a high-precision thermally compensated voltage source. 6. the lnbpxx has two different protection features, and both turn off the outputs. the first one protects against overheating (i.e. for t j 150 c), and the second against overload conditions (i.e. for output current > 550 ma) or short-circuit: a) in the thermal protection case the output is disabled until the chip temperature has fallen below 140 c typ. and the lnbpxx output is restored. b) the overload protection case occurs when output current request is 500 ma. for the dfn package only, the ic features dynamic overload and short-circuit protection. when an overload occurs the device limits the output current for the
detailed description and application hints lnbp8l, LNBP9L, lnbp10l, lnbp11l 10/21 doc id 15153 rev 2 time t on depending on the c ext value (see figure 24 and figure 25 ). when t on has elapsed, the output goes low for a time of t off = 12 x t on . this keeps the power dissipated by the device low in overload conditions, and avoids the need for an oversized heat sink in this condition. for the ippak package, when the overload or the short-circuit occurs, t he device clamps the output current in a range between 550 ma and 850 ma. 7. extm modulates the v out by means of a capacitor connected in series (see figure 6 ). the following equation is used to calculate the peak-to-peak voltage of v out : equation 1 v out (ac) = v extm (ac) x g extm where v out (ac) and v extm (ac) are, respectively, the peak-to-peak voltage of v out and v extm . g extm is the external modulation gain. 6.1 input voltage protection in some cases two or more re ceivers share the same coaxial cable, rendering their outputs hard-paralleled, so the same voltage is present at the outputs of the receivers. if a receiver is not disconnected at the mains, a current will flow from the output to the v cc1 or v cc2 pins, depending the en/vsel pin setting. to avoid this, two diodes (only one for the ippak package) in series are recommended at input pins v cc1 and v cc2 (see figure 3 ). these diodes do not cause a change at v out , but only a voltage drop, which can be minimized by using schottky diodes. diodes used in figure 4 and figure 5 must withstand a continuous current of almost 1 a and a breakdown voltage of 30 v (suggested type is 1n4001 or byv10-30). be aware that the mi nimum voltage needed at the v cc pins must be respected, considering the voltage drop across the input diodes). 6.2 single supply for the dfn package if only one power supply source is available, the v cc1 and v cc2 pins can be powered by the same power source without affecting the perform ance of other circuits, at the cost of higher power losses in the device and higher heat sink surface. also, in order to reduce the power dissipation in the device, an appropriate-value resistor can be inserted in series with the figure 6. extm application circuit vcc en/vsel ( tristate ) output gnd extm d1 1n4001 vextm 23v lnbp8/9l c2 220nf c1 10f lnb output c3 100nf d2 1n5818 c4 1 f
lnbp8l, LNBP9L, lnbp10l, lnbp11l detailed description and application hints doc id 15153 rev 2 11/21 v cc1 line (see figure 5 ). this resistor must be dimensioned considering that the minimum voltage on the v cc1 pin must be >= 16 v (15 v if llc is not used). for example, with i out = 500 ma: equation 2 where v f is the forward voltage of the input diode d1 (see figure 5 ). power dissipated in this resistor is: equation 3 it is recommended to bypass the v cc1 and v cc2 pins using 220 nf electrolytic capacitors. 6.3 ippak mounting and thermal considerations first, it should be noted that the tab is directly connected to the gnd pin, so care must be taken when the device is connected to a heat-sin k. if the heat sink is at a different voltage than the ground, an electrical insulator must be added between the tab and the heat sink at the cost of an increase in the thermal resistance. for better thermal performance, an isolated heat sink or connection to ground is recommended. several clips can be used depending on the heat sink type: saddle clips ( figure 7 ) for slim heat sinks u-clips ( figure 8 ) for thick heat sinks dedicated clips for special shaped heat sinks 12 ? - - 10 x 500 16) (23 -3 f v r 12 ? - - 10 x 500 16) (23 -3 f v r () i out r p d 3 w 10 * 500 * 12 * 2 3 2 = = = - () i out r p d 3 w 10 * 500 * 12 * 2 3 2 = = = - figure 7. ippak mounted with a saddle clip
detailed description and application hints lnbp8l, LNBP9L, lnbp10l, lnbp11l 12/21 doc id 15153 rev 2 note that the thickness of the ippak package (2.3 +/- 0.1 mm) is similar to that of the sot- 32 and sot-82 (2.55 +/- 0.15 mm). the same clips can also be used for these packages. the junction-to-ambient thermal resistance for the ippak can be calculated as follows: equation 4 r th-ja = r th-jc + r th-ch + r th-ha where: r th-jc is the junction-to-case thermal resistance of the ippak (see ta bl e 4 : t h e r m a l data ), r th-ch is the case-to-heat sink thermal resistance and the r th-ha is the heat sink-to- air thermal resistance. figure 8. ippak mounted with a u-clip
lnbp8l, LNBP9L, lnbp10l, lnbp11l typical performance characteristics doc id 15153 rev 2 13/21 7 typical performance characteristics refer to the typical application circuit, t j from 0 to 85 c. typical values are referred to t j = 25 c. figure 9. output voltage vs. temperature figure 10. output voltage vs. temperature figure 11. output voltage vs. temperature figure 12. output voltage vs. temperature figure 13. line regulation vs. temperature figure 14. load regulation vs. temperature 12 12.2 12.4 12.6 12.8 13 13.2 13.4 13.6 13.8 14 -10 0 102030405060708090 t [c] v out [v] v cc1 = 15 v v cc2 = 23 v i out = 50 ma v out = 13 v h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l 12 12.2 12.4 12.6 12.8 13 13.2 13.4 13.6 13.8 14 -10 0 102030405060708090 t [c] v out [v] v cc1 = 15 v v cc2 = 23 v i out = 50 ma v out = 13 v h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l 12 12.2 12.4 12.6 12.8 13 13.2 13.4 13.6 13.8 14 -10 0 10 20 30 40 50 60 70 80 90 t [c] v out [v] v cc1 = 15 v v cc2 = 23 v i out = 500 ma v out = 13 v h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l 12 12.2 12.4 12.6 12.8 13 13.2 13.4 13.6 13.8 14 -10 0 10 20 30 40 50 60 70 80 90 t [c] v out [v] v cc1 = 15 v v cc2 = 23 v i out = 500 ma v out = 13 v h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l 17 17.2 17.4 17.6 17.8 18 18.2 18.4 18.6 18.8 19 -10 0 10 20 30 40 50 60 70 80 90 t [c] v out [v] v cc1 = 15 v v cc2 = 23 v i out = 50 ma v out = 18 v en/vsel=h ten=l, llc=l h = logic high = 5 v l = logic low = 0 v 17 17.2 17.4 17.6 17.8 18 18.2 18.4 18.6 18.8 19 -10 0 10 20 30 40 50 60 70 80 90 t [c] v out [v] v cc1 = 15 v v cc2 = 23 v i out = 50 ma v out = 18 v en/vsel=h ten=l, llc=l h = logic high = 5 v l = logic low = 0 v 17 17.2 17.4 17.6 17.8 18 18.2 18.4 18.6 18.8 19 -10 0 10 20 30 40 50 60 70 80 90 t [c] v out [v] v cc1 = 15 v v cc2 = 23 v i out = 500 ma v out = 18 v h = logic high = 5 v l = logic low = 0 v en/vsel=h ten=l, llc=l 17 17.2 17.4 17.6 17.8 18 18.2 18.4 18.6 18.8 19 -10 0 10 20 30 40 50 60 70 80 90 t [c] v out [v] v cc1 = 15 v v cc2 = 23 v i out = 500 ma v out = 18 v h = logic high = 5 v l = logic low = 0 v en/vsel=h ten=l, llc=l -50 -40 -30 -20 -10 0 10 20 30 40 50 -10 0 10 20 30 40 50 60 70 80 90 t [c] line reg. [mv] v cc1 = 16 v to 25 v v cc2 = 23 v i out = 50 ma v out = 13 v en/vsel=l ten=l, llc=l h = logic high = 5 v l = logic low = 0 v -50 -40 -30 -20 -10 0 10 20 30 40 50 -10 0 10 20 30 40 50 60 70 80 90 t [c] line reg. [mv] v cc1 = 16 v to 25 v v cc2 = 23 v i out = 50 ma v out = 13 v en/vsel=l ten=l, llc=l h = logic high = 5 v l = logic low = 0 v -250 -200 -150 -100 -50 0 50 100 150 200 250 -10 0 10 20 30 40 50 60 70 80 90 t [c] load [mv] v cc1 = 15 v v cc2 = 23 v i out = from 50 ma to 500 ma v out = 13 v h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l -250 -200 -150 -100 -50 0 50 100 150 200 250 -10 0 10 20 30 40 50 60 70 80 90 t [c] load [mv] v cc1 = 15 v v cc2 = 23 v i out = from 50 ma to 500 ma v out = 13 v h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l
typical performance characteristics lnbp8l, LNBP9L, lnbp10l, lnbp11l 14/21 doc id 15153 rev 2 figure 15. load regulation vs. temperatur e figure 16. output current limiting vs. temperature figure 17. output current limiting vs. temperature figure 18. dynamic overload protection on time vs. temperature figure 19. dynamic overload protection off time vs. temperature figure 20. tone enable -150 -100 -50 0 50 100 150 200 250 -10 0 10 20 30 40 50 60 70 80 90 t [c] load [mv] h = logic high = 5 v l = logic low = 0 v en/vsel=h ten=l, llc=l v cc1 = 15 v v cc2 = 23 v i out = from 50 ma to 500 ma v out = 18 v -150 -100 -50 0 50 100 150 200 250 -10 0 10 20 30 40 50 60 70 80 90 t [c] load [mv] h = logic high = 5 v l = logic low = 0 v en/vsel=h ten=l, llc=l v cc1 = 15 v v cc2 = 23 v i out = from 50 ma to 500 ma v out = 18 v 400 450 500 550 600 650 700 750 800 850 900 -10 0 10 20 30 40 50 60 70 80 90 t [c] i lim [ma] h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l v cc1 = 15 v v cc2 = 23 v v out = 13 v 400 450 500 550 600 650 700 750 800 850 900 -10 0 10 20 30 40 50 60 70 80 90 t [c] i lim [ma] h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l v cc1 = 15 v v cc2 = 23 v v out = 13 v 400 450 500 550 600 650 700 750 800 850 900 -10 0 10 20 30 40 50 60 70 80 90 t [c] i lim [ma] h = logic high = 5 v l = logic low = 0 v en/vsel=h ten=l, llc=l v cc1 = 15 v v cc2 = 23 v v out = 18 v 400 450 500 550 600 650 700 750 800 850 900 -10 0 10 20 30 40 50 60 70 80 90 t [c] i lim [ma] h = logic high = 5 v l = logic low = 0 v en/vsel=h ten=l, llc=l v cc1 = 15 v v cc2 = 23 v v out = 18 v 10 30 50 70 90 110 130 150 170 190 210 -10 0 10 20 30 40 50 60 70 80 90 t [c] t on [ms] h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l v cc1 = 16 v v cc2 = 23 v c ext = 4.7 f v out = 13 v 10 30 50 70 90 110 130 150 170 190 210 -10 0 10 20 30 40 50 60 70 80 90 t [c] t on [ms] h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l v cc1 = 16 v v cc2 = 23 v c ext = 4.7 f v out = 13 v h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l 600 700 800 900 1000 1100 1200 -10 0 10 20 30 40 50 60 70 80 90 t [c] t off [ms] v cc1 = 15 v v cc2 = 23 v c ext = 4.7 f v out = 13 v h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l 600 700 800 900 1000 1100 1200 -10 0 10 20 30 40 50 60 70 80 90 t [c] t off [ms] v cc1 = 15 v v cc2 = 23 v c ext = 4.7 f v out = 13 v en/vsel=l ten=h, llc=l v cc1 = 23 v v cc2 = 23 v i out = 50 ma v out = 13 v en/vsel=l ten=h, llc=l v cc1 = 23 v v cc2 = 23 v i out = 50 ma v out = 13 v
lnbp8l, LNBP9L, lnbp10l, lnbp11l typical performance characteristics doc id 15153 rev 2 15/21 figure 21. tone disable figure 22. external modulation gain vs. temperature figure 23. external modulation gain vs. frequency figure 24. t on time vs. c ext figure 25. t off time vs. c ext en/vsel=l ten=h, llc=l v cc1 = 23 v v cc2 = 23 v i out = 50 ma v out = 13 v en/vsel=l ten=h, llc=l v cc1 = 23 v v cc2 = 23 v i out = 50 ma v out = 13 v h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 -10 0 10 20 30 40 50 60 70 80 90 t [c] gain v cc1 = 15 v v cc2 = 23 v i out = 50 ma v out = 13 v f = 22 khz h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 -10 0 10 20 30 40 50 60 70 80 90 t [c] gain v cc1 = 15 v v cc2 = 23 v i out = 50 ma v out = 13 v f = 22 khz 3.5 4 4.5 5 5.5 6 6.5 7 1000 10000 100000 f [hz] gain h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l v cc1 = 15 v v cc2 = 23 v i out = 50 ma v out = 13 v 3.5 4 4.5 5 5.5 6 6.5 7 1000 10000 100000 f [hz] gain h = logic high = 5 v l = logic low = 0 v en/vsel=l ten=l, llc=l v cc1 = 15 v v cc2 = 23 v i out = 50 ma v out = 13 v 0 50 100 150 200 250 300 350 400 0 5 10 15 capacitor c ext [ f] t on [ms] 0 50 100 150 200 250 300 350 400 0 5 10 15 capacitor c ext [ f] t on [ms] 0 500 1000 1500 2000 2500 3000 3500 4000 0 5 10 15 capacitor c ext [ f] t off [ms] 0 500 1000 1500 2000 2500 3000 3500 4000 0 5 10 15 capacitor c ext [ f] t off [ms]
package mechanical data lnbp8l, LNBP9L, lnbp10l, lnbp11l 16/21 doc id 15153 rev 2 8 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions an d product status are available at: www.st.com . ecopack ? is an st trademark. figure 26. ippak package dimensions 0075222
lnbp8l, LNBP9L, lnbp10l, lnbp11l package mechanical data doc id 15153 rev 2 17/21 note: 1 controlling dime nsions: millimeter. 2 burrs larger than 0.25 mm are not allowed on the upper surface of the dissipater (front) on the lower surface (rear) the maximum allowed is: 0.05 mm. 3 the side of the dissipater to be connected to t he external dissipater must be flat within 30 4 the leads size is comprehensive of the thickness of the leads finishing material. 5 package outline exclusive of any mold flashes dimensions and metal burrs. 6 max resin gate protrusion: 0.5 mm. 7 max resin protrusion: 0.25 mm. 8 the maximum bent leads allowed, in any direction, is: # 2 if the devices are packed in tube. table 6. ippak mechanical data dim. (mm.) min. typ. max. a2.20 2.40 a1 0.90 1.10 b0.40 0.60 b2 5.20 5.40 b3 0.70 b5 0.30 b6 1 c0.45 0.60 c2 0.48 0.60 d 6 6.20 e6.40 6.60 e1.27 g4.90 5.25 g1 2.38 2.70 h 15.90 16.30 l 9 9.40 l1 0.80 1.20 l2 0.80 1 v1 10
package mechanical data lnbp8l, LNBP9L, lnbp10l, lnbp11l 18/21 doc id 15153 rev 2 dim. mm. inch. min. typ. max. min. typ. max. a0. 8 00. 9 0 1.00 0.0 3 2 0.0 3 5 0.0 39 a1 0.02 0.05 0.001 0.002 a 3 0.20 0.00 8 b 0. 3 5 0.40 0.47 0.014 0.016 0.01 8 d 5.00 0.1 9 7 d2 4.15 4.2 4.25 0.16 3 0.165 0.167 e 6.00 0.2 3 6 e2 3 .55 3 .6 3 .65 0.140 0.142 0.144 e 1.27 0.04 9 f1. 99 0.07 8 g 2.20 0.0 8 6 h 0.40 0.015 i 0.21 9 0.00 8 6 l 0.70 0. 9 0 0.02 8 0.0 3 5 dfn 8 (5x6 mm) mechanical data 72 8 646 3 /c
lnbp8l, LNBP9L, lnbp10l, lnbp11l ordering information doc id 15153 rev 2 19/21 9 ordering information table 7. order codes part numbers order codes packing dfn8 (5 x 6 mm) ippak lnbp8l lnbp8lit tape and reel LNBP9L LNBP9Lit tape and reel lnbp10l lnbp10lpur tape and reel lnbp11l lnbp11lpur tape and reel
revision history lnbp8l, LNBP9L, lnbp10l, lnbp11l 20/21 doc id 15153 rev 2 10 revision history table 8. document revision history date revision changes 11-nov-2008 1 initial release. 25-aug-2010 2 document stat us promoted from prelim inary data to datasheet.
lnbp8l, LNBP9L, lnbp10l, lnbp11l doc id 15153 rev 2 21/21 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2010 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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